Feature Articles: Ultrahigh-speed Transmission Technology to Support High-capacity Communications Infrastructure of the Future

Ultrahigh-speed Optical Front-end Device Technology for Beyond-100-GBaud Optical Transmission Systems

Munehiko Nagatani, Hitoshi Wakita, Yoshihiro Ogiso,
Hiroshi Yamazaki, Minoru Ida, and Hideyuki Nosaka

Abstract

To support sustainable progress of optical communications, intense research and development (R&D) is being conducted to expand the transmission capacity per channel (transmission capacity per wavelength). Beyond-100-GBaud high-symbol-rate optical transmission technology is now attracting a great deal of attention for its use in constructing future cost-effective optical transport networks. This article introduces recent trends and challenges in optical communications and presents NTT’s recent R&D in ultrahigh-speed optical front-end device technology for beyond-100-GBaud systems.

Keywords: high-symbol-rate optical transmission, bandwidth doubler, optical front-end device

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1. Trends and challenges in optical communications

The amount of data traffic in optical communications networks continues to grow exponentially due to the spread of broadband applications and services such as video streaming, cloud computing, and IoT (Internet of Things). In particular huge-capacity and long-haul transmission technology is required in the core network in order to accommodate client data and to link metropolitan areas. Novel digital coherent technology, which combines coherent detection and digital signal processing, has been deployed to cope with such rapid growth in communications traffic [1]. To date, 100-Gbit/s-per-channel (wavelength) systems based on 32-GBaud polarization division multiplexing (PDM) quadrature phase-shift keying and 400-Gbit/s-per-channel systems based on two-subcarrier 32-GBaud PDM 16-ary quadrature amplitude modulation (16QAM) have been put into practical use.

In the future, transmission capacity per channel is expected to exceed 1 Tbit/s to handle the ever-growing communications traffic. The transmission capacity can be increased by increasing the symbol rate, increasing the modulation order, or adding more subcarriers. Increasing the symbol rate is the most advantageous approach from the viewpoint of ensuring both cost effectiveness and transmission distance. Therefore, high-symbol-rate beyond-100-GBaud optical transmission technology is now attracting a great deal of attention for its use in constructing future optical transport systems with capacities exceeding 1 Tbit/s per channel.

Researchers face several challenges in constructing an optical transceiver enabling beyond-100-GBaud systems. A block diagram of a conventional optical transceiver for digital coherent systems is shown in Fig. 1. To construct a 100-GBaud system, each building block in the transceiver needs to have at least a 50-GHz analog bandwidth, which is the Nyquist frequency of 100 GBaud. One of the biggest challenges is finding a way to overcome the analog-bandwidth limitation of digital-to-analog converters (DACs) and analog-to-digital converters (ADCs), which are fabricated using Si (silicon) complementary metal oxide semiconductor (CMOS) technology.


Fig. 1. Block diagram of conventional optical transceiver for digital coherent systems.

The analog-bandwidth performance of cutting-edge CMOS-based DACs and ADCs is shown in Fig. 2. This graph indicates that it is very hard for CMOS-based DACs and ADCs to satisfy the target analog-bandwidth of over 50 GHz. One more unavoidable challenge is determining how to integrate and assemble optical front-end devices—modulator drivers (DRVs) and optical modulators on the transmitter side and trans-impedance amplifiers and photodiodes on the receiver side—into a packaged module to avoid a degradation in quality of beyond-100-GBaud signals due to extra loss derived from packaging. Hence, integration and packaging technology becomes much more important in beyond-100-GBaud systems.


Fig. 2. Cutting-edge CMOS-based DACs and ADCs (analog bandwidth performance vs. CMOS technology).

2. Bandwidth doubler technology

We have devised novel bandwidth doubling technology to overcome the analog-bandwidth limitation of CMOS-based DACs and ADCs [2]. A block diagram of an optical transceiver applying the bandwidth doubler is shown in Fig. 3. On the transmitter side, two pre-processed analog signals from CMOS-sub-DACs are multiplexed into one double-bandwidth signal by the analog multiplexer (AMUX). On the receiver side, one broadband signal is demultiplexed into two half-bandwidth signals by the analog demultiplexer (ADEMUX), and they are digitized and post-processed by the following CMOS-sub-ADCs and digital signal processor. Using this bandwidth doubler technology, we can expand the usable baseband signal bandwidth twice and achieve twice the symbol rate compared with a conventional transceiver (which is why we call this technology bandwidth doubler).


Fig. 3. Block diagram of optical transceiver applying bandwidth doubler technology.

The AMUX and ADEMUX integrated circuits (ICs) for the bandwidth doubler were designed and fabricated using our in-house indium phosphide heterojunction bipolar transistor (InP HBT) [3]. We have already succeeded in conducting a proof-of-principle experiment and beyond-100-GBaud optical transmission [4]. In addition, we recently demonstrated the world’s first 1-Tbit/s-per-channel long-haul WDM (wavelength division multiplexing) optical transmission using 120-GBaud probabilistically shaped PDM 64QAM [5]. These results confirmed that the bandwidth doubler is promising for future beyond-100-GBaud systems.

3. The latest AMUX IC and 160-GBaud signal generation

We are now developing faster AMUX and ADEMUX ICs to further improve optical transmission performance. Using newly developed in-house 0.25-μm InP HBT technology [6], we succeeded in developing an AMUX IC with a bandwidth over 110 GHz (a world record) in 2018 [7]. The performance of the 0.25-μm InP HBTs and AMUX IC is summarized in Fig. 4. The fabricated HBTs have a peak fT (cutoff frequency) and fmax (maximum oscillation frequency) of 460 and 480 GHz, respectively. The AMUX IC consists of two input buffers, a clock buffer, an AMUX core, and an output buffer. It is designed to have broad peaking characteristics in its frequency response to compensate for packaging loss.


Fig. 4. Images of 0.25-μm InP HBT and AMUX IC and radio frequency performance of AMUX IC.

The measured bandwidths for the analog and clock paths were both over 110 GHz. These measurement results indicate that this AMUX IC can potentially be used in constructing a 110-GHz-bandwidth 220-GS/s DAC subsystem and to generate 200-GBaud-class modulated signals. We have already demonstrated signal generation at ultrahigh symbol rates by applying this AMUX IC to the bandwidth doubler. The measurement setup and results are shown in Fig. 5. In this demonstration, we succeeded in generating a 160-GBaud PAM-4 (4-level pulse amplitude modulation) signal with two 40-GHz-bandwidth sub-DACs and the AMUX IC and demonstrating the further scalability of the bandwidth doubler technology [8]. Digital coherent optical transmission with a capacity of over 1-Tbit/s per channel will be achievable by using this AMUX IC.


Fig. 5. Demonstration of 160-GBaud PAM-4 (4-level pulse amplitude modulation) signal generation.

4. Concept of ultrahigh-speed integrated optical front-end module

One more important issue for beyond-100-GBaud systems is integration and packaging technology, as mentioned in the first section. This is especially true regarding the transmitter, where the AMUXs, DRVs, and optical modulators have to be placed as close to each other as possible. In addition, all these devices have to be assembled into one integrated packaged module in order to ensure the quality of ultrabroadband modulated signals.

We have developed an AMUX IC equipped with a DRV function (AMUX-DRV IC) and studied a design incorporating the AMUX-DRV IC and optical modulators for an ultrahigh-speed integrated optical front-end module. Because monolithic integration of the AMUX function and DRV function into one chip is advantageous for ensuring the signal quality and reducing power consumption, we replaced an output buffer with a DRV function block consisting of a high-gain, high-linearity, and large-output-swing amplifier in the AMUX IC, and designed the AMUX-DRV IC. For the optical front-end, we used in-house InP MZM (Mach-Zehnder modulator)-based optical IQ (in-phase and quadrature) modulators, which have an electro-optical (EO) modulation bandwidth of 80 GHz. The AMUX-DRV IC was designed to have broad peaking characteristics to compensate for the frequency response of the following modulator and to have optimum output impedance and driving voltage for the modulator.

A conceptual block diagram of the integrated optical front-end module is shown in Fig. 6, which also summarizes the performance of the AMUX-DRV IC and InP MZM. The AMUX-DRV IC has broad peaking characteristics and ultrabroad bandwidth of over 110 GHz as expected. With this AMUX-DRV IC, the optical front-end module could be expected to have an ultrabroad EO bandwidth of 80 GHz. We have actually already fabricated a sub-assembly that contains the AMUX-DRV IC and InP MZM and have succeeded in demonstrating 400-Gbit/s-per-channel DMT (discrete multi-tone) signal optical transmission [9]. This is a record for IMDD (intensity modulation and direct detection) optical transmission so far and indicates the capability of over-1-Tbit/s-per-channel digital coherent optical transmission. In the next step, we will complete the optical front-end module and apply it to digital coherent optical transmission.


Fig. 6. Conceptual block diagram of integrated optical front-end module and performance summary of AMUX-DRV IC and InP MZM.

5. Summary

In this article, we introduced recent trends and challenges in optical communications and our research and development (R&D) of ultrahigh-speed optical front-end device technology for future beyond-100-GBaud systems. We will continue to promote further speed improvements and continue with our R&D so that this technology can ensure sustainable progress of optical communications.

References

[1] Y. Miyamoto, A. Sano, E. Yoshida, and T. Sakano, “Ultrahigh-capacity Digital Coherent Optical Transmission Technology,” NTT Technical Review, Vol. 9, No. 8, 2011.
https://www.ntt-review.jp/archive/ntttechnical.php?contents=ntr201108fa2.html
[2] M. Nagatani, H. Yamazaki, F. Hamaoka, H. Nosaka, and Y. Miyamoto, “Bandwidth Doubler Technology for Increasing the Bandwidth of an Optical Transmitter,” NTT Technical Journal, Vol. 29, No. 3, pp. 62–66, 2017 (in Japanese).
[3] S. Yamahata, K. Kurishima, Y. Fukai, H. Fukuyama, and M. Hirata, “Fabrication Technology of Highly-reliable InP-HBT Integrated Circuits,” NTT Technical Journal, Vol. 19, No. 11, pp. 62–65, 2007 (in Japanese).
[4] H. Yamazaki, M. Nagatani, S. Kanazawa, H. Nosaka, T. Hashimoto, A. Sano, and Y. Miyamoto, “Digital-preprocessed Analog-multiplexed DAC for Ultrawideband Multilevel Transmission,” J. Lightw. Technol., Vol. 34, No. 7, pp. 1579–1584, 2016.
[5] M. Nakamura, F. Hamaoka, M. Nagatani, H. Yamazaki, T. Kobayashi, A. Matsushita, S. Okamoto, H. Wakita, H. Nosaka, and Y. Miyamoto, “1.04 Tbps/carrier Probabilistically Shaped PDM-64QAM WDM Transmission over 240 km Based on Electrical Spectrum Synthesis,” Proc. of the 42nd Optical Fiber Communication Conference and Exhibition (OFC 2019), paper M4I.4., San Diego, CA, USA, Mar. 2019.
[6] N. Kashio, K. Kurishima, M. Ida, and H. Matsuzaki, “Over 450-GHz fT and fmax InP/InGaAs DHBTs with a Passivation Ledge Fabricated by Utilizing SiN/SiO2 Sidewall Spacers,” IEEE Trans. Electron Devices, Vol. 61, No. 10, pp. 3423–3428, 2014.
[7] M. Nagatani, H. Wakita, H. Yamazaki, M. Mutoh, M. Ida, Y. Miyamoto, and H. Nosaka, “An Over-110-GHz-bandwidth 2:1 Analog Multiplexer in 0.25-μm InP DHBT Technology,” Proc. of the 2018 IEEE/MTT-S International Microwave Symposium (IMS2018), Philadelphia, PA, USA, June 2018.
[8] Y. Ogiso, J. Ozaki, Y. Ueda, N. Kashio, N. Kikuchi, E. Yamada, H. Tanobe, S. Kanazawa, H. Yamazaki, Y. Ohiso, T. Fujii, and M. Kotoku, “Over 67 GHz Bandwidth and 1.5-V Vπ InP-based Optical IQ Modulator with n-i-p-n Heterostructure,” J. Lightw. Technol., Vol. 35, No. 8, pp. 1450–1455, 2017.
[9] H. Yamazaki, M. Nagatani, H. Wakita, Y. Ogiso, M. Nakamura, M. Ida, T. Hashimoto, H. Nosaka, and Y. Miyamoto, “Transmission of 400-Gbps Discrete Multi-tone Signal Using > 100-GHz-bandwidth Analog Multiplexer and InP Mach-Zehnder Modulator,” Proc. of the 44th European Conference on Optical Communication (ECOC 2018), pp. 1–3, Rome, Italy, Sept. 2018.
Munehiko Nagatani
Distinguished Researcher, NTT Device Technology Laboratories and NTT Network Innovation Laboratories.
He received an M.S. in electrical and electronics engineering from Sophia University, Tokyo, in 2007. He joined NTT Photonics Laboratories in 2007, where he engaged in the research and development (R&D) of ultrahigh-speed analog and mixed-signal ICs for optical communications systems. He is concurrently with NTT Device Technology Laboratories and NTT Network Innovation Laboratories, where he is involved in R&D of ultrahigh-speed ICs and systems for optical transmission using advanced modulation formats. He was a recipient of the 2011 Young Researchers Award by the Institute of Electronics, Information and Communication Engineers (IEICE). He served as a technical program committee member for the Institute of Electrical and Electronics Engineers (IEEE) Compound Semiconductor Integrated Circuits Symposium (CSICS) from 2014 to 2017. He has been serving as a technical program committee member for IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS) since 2018 and IEEE International Solid-State Circuits Conference (ISSCC) since 2019. He is a member of IEICE and IEEE.
Hitoshi Wakita
Researcher, NTT Device Technology Laboratories.
He received a B.S. in organic and polymeric materials in 2008 and an M.S. in chemistry and materials science in 2010, both from Tokyo Institute of Technology. In 2010, he joined NTT Photonics Laboratories, where he has been engaged in R&D of ultrahigh-speed mixed signal ICs and modules for optical communications systems. He is currently with NTT Device Technology Laboratories. He is a member of IEICE and IEEE.
Yoshihiro Ogiso
Researcher, NTT Device Innovation Center.
He received a B.E. and M.E. in applied physics in optoelectronics from Waseda University, Tokyo, in 2008 and 2010. He joined NTT Photonics Laboratories in 2010. He is currently with NTT Device Innovation Center, where he is involved in R&D of ultrahigh-speed optical modulators. He is a member of IEICE.
Hiroshi Yamazaki
Distinguished Researcher, NTT Device Technology Laboratories and NTT Network Innovation Laboratories.
He received a B.S. in integrated human studies in 2003 and an M.S. in human and environmental studies in 2005, both from Kyoto University, and a Dr. Eng. in electronics and applied physics from Tokyo Institute of Technology in 2015. He joined NTT Photonics Laboratories in 2005, where he has been involved in research on optical waveguide devices for communications systems. He is concurrently with NTT Network Innovation Laboratories and NTT Device Technology Laboratories, where he is involved in research on devices and systems for optical transmission using advanced multilevel modulation formats. He has been an Associate Editor of IEEE Journal of Lightwave Technology since 2016. He is a member of IEICE.
Minoru Ida
Senior Researcher, NTT Device Technology Laboratories.
He received a B.S. and M.S. in electrical engineering from Keio University, Kanagawa, in 1989 and 1991, and a Ph.D. in physical electronics from Tokyo Institute of Technology in 2005. He joined NTT LSI Laboratories in 1991, where he conducted research on metalorganic vapor phase epitaxy growth and InP-based heterojunction bipolar transistors (HBTs). From 1996 to 1998, he worked with NTT Wireless System Laboratories on GaAs monolithic microwave integrated circuits (MMICs) for wireless applications. He is currently researching high-speed InP-based HBT devices and developing fabrication processes of ICs for optical networks at NTT Device Technology Laboratories.
Hideyuki Nosaka
Senior Research Engineer, Group Leader of High-Speed Analog Circuit Research Group, NTT Device Technology Laboratories.
He received a B.S. and M.S. in physics from Keio University, Kanagawa, in 1993 and 1995, and a Dr. Eng. in electronics and electrical engineering from Tokyo Institute of Technology in 2003. He joined NTT Wireless System Laboratories in 1995, where he was engaged in R&D of MMICs and frequency synthesizers. Since 1999, he has been involved in R&D of ultrahigh-speed mixed-signal ICs for optical communications systems at NTT Photonics Laboratories. He received the 2001 Young Engineer Award and the 2012 Best Paper Award presented by IEICE. He served as a technical program committee member for IEEE CSICS from 2011 to 2013 and IEEE ISSCC from 2013 to 2017. He is a member of IEEE Microwave Theory and Techniques Society (MTT-S) Technical Committee on Digital Signal Processing (MTT-9). He is a member of IEICE and IEEE.

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